1. Field of the Invention
The invention relates to a video processing method and apparatus, and more particularly, to a video processing method and apparatus capable of saving bandwidth.
2. Description of the Prior Art
Following the development and popularization of consumer electronics products, video and audio entertainment products have become a large part of life. Furthermore, the progress of technology gives people more and more different entertainment choices. Taking TV for example, previously TV only received signals from broadcast TV stations, and consumers could only choose a limited number of channels. Because of cable TV, the number of channels has increased significantly and consumers have more choices. In recent years, in order to provide consumers better display quality, many display standards have been issued. Among these innovations, the most important one is the invention of digital TV, which started a brand-new field. For example, a digital TV can be utilized with a multimedia computer system, and furthermore, a digital TV has better display quality.
Generally speaking, a digital TV system utilizes a bus structure to communicate among its internal elements. Please refer to FIG. 1, which is a block diagram of a typical digital TV 10. The digital TV 10 comprises a memory 12, a front-end processor 14, a MPEG decoder 16, a display engine 17, a display panel 18, and a bus 20 to which the aforementioned elements are coupled. The memory 12 is utilized to store video data, and the memory 12 can be divided into two memory blocks 22, 24, wherein the memory block 22 is utilized to store un-decoded video data, and the memory block 24 is utilized to store decoded video data. The front-end processor 14 receives un-decoded video data from an antenna or other sources, performs pre-processing on the received video data, and stores the processed video data in the memory block 22 of the memory 12 through the bus 20. The MPEG decoder 16 then reads out the un-decoded video data from the memory block 22 of the memory 12, performs MPEG decoding, and writes back the decoded display data in the memory block 24 of the memory 12 through the bus 20. Finally, the display engine 17 reads the display data from the memory block 24, and drives the panel 18 according to the display data to display images corresponding to the digital TV signals received by the digital TV 10.
Because data transferred by the digital signal is generally quite large, the bandwidth of the bus 20 or of the memory 12 often becomes a bottleneck in the system structure of a digital TV system, and should be considered during system design. However, in a digital TV system, many features utilizing digital data processing, such as picture-in-picture (PIP), or on-screen display (OSD), often generate overlapping pictures. For example, a sub-picture covers a part of a main picture, or OSD covers a video picture, resulting in a part of the processed and decoded video data is not shown in the panel 18 because it is covered. In the above-mentioned situation, it is obvious that the bandwidth used to process the covered area is wasted, because the video data corresponding to the covered area used considerable bandwidth during decoding and processing but not shown in the panel 18.